Loading target/device/jp/q5/kernel-patches-2.4.32/001-q5 0 → 100644 +342 −0 Original line number Diff line number Diff line diff -Naur linux-2.4.31.org/arch/mips/Makefile linux-2.4.31/arch/mips/Makefile --- linux-2.4.31.org/arch/mips/Makefile 2005-01-19 09:09:26.000000000 -0500 +++ linux-2.4.31/arch/mips/Makefile 2005-09-10 17:29:44.000000000 -0400 @@ -241,6 +241,16 @@ endif # +# jp-embedded Q5 board +# +ifdef CONFIG_MIPS_Q5 +LIBS += arch/mips/jp-embedded/q5/q5.o \ + arch/mips/au1000/common/au1000.o +SUBDIRS += arch/mips/jp-embedded/q5 arch/mips/au1000/common +LOADADDR := 0x80100000 +endif + +# # Au1x00 (AMD/Alchemy) eval boards # ifdef CONFIG_MIPS_DB1000 diff -Naur linux-2.4.31.org/arch/mips/au1000/common/pci_fixup.c linux-2.4.31/arch/mips/au1000/common/pci_fixup.c --- linux-2.4.31.org/arch/mips/au1000/common/pci_fixup.c 2005-01-19 09:09:26.000000000 -0500 +++ linux-2.4.31/arch/mips/au1000/common/pci_fixup.c 2005-09-10 17:47:29.000000000 -0400 @@ -101,7 +101,7 @@ void __init pcibios_fixup_irqs(void) { -#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 ) +#if defined( CONFIG_MIPS_PB1500 ) || defined( CONFIG_MIPS_PB1550 ) unsigned int slot; unsigned char pin; struct pci_dev *dev; diff -Naur linux-2.4.31.org/arch/mips/config-shared.in linux-2.4.31/arch/mips/config-shared.in --- linux-2.4.31.org/arch/mips/config-shared.in 2005-01-19 09:09:27.000000000 -0500 +++ linux-2.4.31/arch/mips/config-shared.in 2005-08-23 00:30:32.000000000 -0400 @@ -31,6 +31,7 @@ dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32 dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32 dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32 +dep_bool 'Support for jp-embedded Q5 board' CONFIG_MIPS_Q5 $CONFIG_MIPS32 dep_bool 'Support for MyCable XXS1500 board' CONFIG_MIPS_XXS1500 $CONFIG_MIPS32 dep_bool 'Support for 4G Systems MTX-1 board' CONFIG_MIPS_MTX1 $CONFIG_MIPS32 dep_bool 'Support for Cogent CSB250 board' CONFIG_COGENT_CSB250 $CONFIG_MIPS32 @@ -277,6 +278,12 @@ define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y fi +if [ "$CONFIG_MIPS_Q5" = "y" ]; then + define_bool CONFIG_SOC_AU1X00 y + define_bool CONFIG_SOC_AU1500 y + define_bool CONFIG_NONCOHERENT_IO y + define_bool CONFIG_PC_KEYB y +fi if [ "$CONFIG_MIPS_DB1000" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1000 y @@ -729,6 +736,7 @@ "$CONFIG_MIPS_PB1000" = "y" -o \ "$CONFIG_MIPS_PB1100" = "y" -o \ "$CONFIG_MIPS_PB1500" = "y" -o \ + "$CONFIG_MIPS_Q5" = "y" -o \ "$CONFIG_NEC_OSPREY" = "y" -o \ "$CONFIG_NEC_EAGLE" = "y" -o \ "$CONFIG_NINO" = "y" -o \ diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/Makefile linux-2.4.31/arch/mips/jp-embedded/q5/Makefile --- linux-2.4.31.org/arch/mips/jp-embedded/q5/Makefile 1969-12-31 19:00:00.000000000 -0500 +++ linux-2.4.31/arch/mips/jp-embedded/q5/Makefile 2005-09-10 16:46:20.000000000 -0400 @@ -0,0 +1,9 @@ +USE_STANDARD_AS_RULE := true + +O_TARGET := q5.o + +export-objs = init.o + +obj-y := init.o board_setup.o irqmap.o + +include $(TOPDIR)/Rules.make diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/board_setup.c linux-2.4.31/arch/mips/jp-embedded/q5/board_setup.c --- linux-2.4.31.org/arch/mips/jp-embedded/q5/board_setup.c 1969-12-31 19:00:00.000000000 -0500 +++ linux-2.4.31/arch/mips/jp-embedded/q5/board_setup.c 2005-08-30 14:46:21.000000000 -0400 @@ -0,0 +1,97 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * jp-embedded Q5 board setup. + * + * Author: jp@jp-embedded.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/config.h> +#include <linux/init.h> +#include <linux/sched.h> +#include <linux/ioport.h> +#include <linux/mm.h> +#include <linux/console.h> +#include <linux/mc146818rtc.h> +#include <linux/delay.h> + +#include <asm/cpu.h> +#include <asm/bootinfo.h> +#include <asm/irq.h> +#include <asm/keyboard.h> +#include <asm/mipsregs.h> +#include <asm/reboot.h> +#include <asm/pgtable.h> +#include <asm/au1000.h> +#include <asm/pb1500.h> + +#ifdef CONFIG_USB_OHCI +// Enable the workaround for the OHCI DoneHead +// register corruption problem. +#define CONFIG_AU1000_OHCI_FIX +#endif + +#ifdef CONFIG_RTC +extern struct rtc_ops pb1500_rtc_ops; +#endif + +void board_reset (void) +{ + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] obs */ + au_writel(0x00000000, 0xAE00001C); +} + +void __init board_setup(void) +{ + u32 pin_func; + u32 sys_freqctrl, sys_clksrc; + +#ifdef CONFIG_PCI + // Setup PCI bus controller + au_writel(0, Au1500_PCI_CMEM); + au_writel(0x00003fff, Au1500_CFG_BASE); + au_writel(0xf, Au1500_PCI_CFG); + au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV); + au_writel(0, Au1500_PCI_MWBASE_REV_CCL); + au_writel(0x02a00356, Au1500_PCI_STATCMD); + au_writel(0x00003c04, Au1500_PCI_HDRTYPE); + au_writel(0x00000008, Au1500_PCI_MBAR); + au_sync(); +#endif + + /* Enable sys bus clock divider when IDLE state or no bus activity. */ + au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); + +#ifdef CONFIG_RTC + rtc_ops = &pb1500_rtc_ops; + // Enable the RTC if not already enabled + if (!(au_readl(0xac000028) & 0x20)) { + printk("enabling clock ...\n"); + au_writel((au_readl(0xac000028) | 0x20), 0xac000028); + } + // Put the clock in BCD mode + if (readl(0xac00002C) & 0x4) { /* reg B */ + au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); + au_sync(); + } +#endif +} diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/init.c linux-2.4.31/arch/mips/jp-embedded/q5/init.c --- linux-2.4.31.org/arch/mips/jp-embedded/q5/init.c 1969-12-31 19:00:00.000000000 -0500 +++ linux-2.4.31/arch/mips/jp-embedded/q5/init.c 2005-09-10 16:43:21.000000000 -0400 @@ -0,0 +1,80 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * jp-embedded Q5 board setup. + * + * Author: jp@jp-embedded.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/sched.h> +#include <linux/bootmem.h> +#include <asm/addrspace.h> +#include <asm/bootinfo.h> +#include <linux/string.h> +#include <linux/kernel.h> +#include <linux/sched.h> + +int prom_argc; +char **prom_argv, **prom_envp; +extern void __init prom_init_cmdline(void); +extern char *prom_getenv(char *envname); +void (*__wbflush) (void); + +void au1500_wbflush(void) +{ + __asm__ volatile ("sync"); +} + +const char *get_system_type(void) +{ + return "jp-embedded Q5"; +} + +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec) +{ + unsigned char *memsize_str; + unsigned long memsize; + + prom_argc = argc; + prom_argv = argv; + prom_envp = envp; + + __wbflush = au1500_wbflush; + + /* obs */ + mips_machgroup = MACH_GROUP_ALCHEMY; + mips_machtype = MACH_PB1500; + + prom_init_cmdline(); + memsize_str = prom_getenv("memsize"); + if (!memsize_str) { + memsize = 0x04000000; + } else { + memsize = simple_strtol(memsize_str, NULL, 0); + } + add_memory_region(0, memsize, BOOT_MEM_RAM); + return 0; +} + +EXPORT_SYMBOL(__wbflush); diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/irqmap.c linux-2.4.31/arch/mips/jp-embedded/q5/irqmap.c --- linux-2.4.31.org/arch/mips/jp-embedded/q5/irqmap.c 1969-12-31 19:00:00.000000000 -0500 +++ linux-2.4.31/arch/mips/jp-embedded/q5/irqmap.c 2005-09-10 16:45:18.000000000 -0400 @@ -0,0 +1,61 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * jp-embedded Q5 board setup. + * + * Author: jp@jp-embedded.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/kernel_stat.h> +#include <linux/module.h> +#include <linux/signal.h> +#include <linux/sched.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/timex.h> +#include <linux/slab.h> +#include <linux/random.h> +#include <linux/delay.h> + +#include <asm/bitops.h> +#include <asm/bootinfo.h> +#include <asm/io.h> +#include <asm/mipsregs.h> +#include <asm/system.h> +#include <asm/au1000.h> + +au1xxx_irq_map_t au1xxx_irq_map[] = { + { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, + { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, + { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, + { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, + { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, + { AU1500_GPIO_206, INTC_INT_FALL_EDGE, 0 }, + { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 }, +}; + +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); + --- linux-2.4.31.org/Documentation/Configure.help 2005-04-03 21:42:19.000000000 -0400 +++ linux-2.4.31/Documentation/Configure.help 2005-09-10 18:50:14.340000000 -0400 @@ -2197,6 +2197,12 @@ MIPS-32-based Baget embedded system. This chipset is better known via the NE2100 cards. +jp-embedded Q5 support +CONFIG_MIPS_Q5 + This enables support for jp-embedded's MIPS based boards. The + boards uses the AU1500 cpu. For more information about these + boards, see <http://www.jp-embedded.com/>. + Support for DECstations CONFIG_DECSTATION This enables support for DEC's MIPS based workstations. For details target/device/jp/q5/kernel-patches-2.4.32/005-dp83847 0 → 100644 +162 −0 Original line number Diff line number Diff line diff -Naur linux-2.4.31.org/drivers/net/au1000_eth.c linux-2.4.31/drivers/net/au1000_eth.c --- linux-2.4.31.org/drivers/net/au1000_eth.c 2005-01-19 09:09:56.000000000 -0500 +++ linux-2.4.31/drivers/net/au1000_eth.c 2005-08-22 12:24:31.000000000 -0400 @@ -595,6 +595,97 @@ return 0; } +int ns_83847_reset(struct net_device *dev, int phy_addr) + { + s16 mii_control, timeout; + + // printk("ns_reset\n"); + mii_control = mdio_read(dev, phy_addr, MII_CONTROL); + mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); + mdelay(1); + for (timeout = 100; timeout > 0; --timeout) { + mii_control = mdio_read(dev, phy_addr, MII_CONTROL); + if ((mii_control & MII_CNTL_RESET) == 0) + break; + mdelay(1); + } + if (mii_control & MII_CNTL_RESET) { + printk(KERN_ERR "%s PHY reset timeout !\n", dev->name); + return -1; + } + return 0; + } + +int ns_83847_init(struct net_device *dev, int phy_addr) + { + s16 data; + // printk("ns_init\n"); + + /* Stop auto-negotiation */ + // data = mdio_read(dev, phy_addr, MII_CONTROL); + // mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO); + // mdio_write(dev, phy_addr, 0, 0x0000); + mdio_write(dev, phy_addr, MII_CONTROL, MII_CNTL_F100 /* | MII_CNTL_FDX */); + + /* Set advertisement to 10/100 and Half/Full duplex (full capabilities) */ + data = mdio_read(dev, phy_addr, MII_ANADV); + /* obs PAUSE bit */ + data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T; /* MII_NWAY_T4 not sopported */ ; + mdio_write(dev, phy_addr, MII_ANADV, data); + + /* Bypass led stretching? */ + data = mdio_read(dev, phy_addr, MII_NS_PHYCTRL); + data |= MII_NS_PHYCTRL_BP_STRETCH; + mdio_write(dev, phy_addr, MII_NS_PHYCTRL, data); + + /* Restart auto-negotiation */ + data = mdio_read(dev, phy_addr, MII_CONTROL); + data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO; + mdio_write(dev, phy_addr, MII_CONTROL, data); + + return 0; + } + +int ns_83847_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed) + { + u16 mii_data; + struct au1000_private *aup; + + if (!dev) { + printk(KERN_ERR "ns_83847_status error: NULL dev\n"); + return -1; + } + aup = (struct au1000_private *) dev->priv; + + mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS); + // printk("ns_status: %04x\n", mii_data); + if (mii_data & MII_STAT_LINK) { + *link = 1; + mii_data = mdio_read(dev, aup->phy_addr, MII_NS_PHYSTS); + if (mii_data & MII_NS_PHYSTS_SPEED_10) { + *speed = IF_PORT_10BASET; + dev->if_port = IF_PORT_10BASET; + } + else { + if (mii_data & MII_NS_PHYSTS_DUPLEX_FULL) { + *speed = IF_PORT_100BASEFX; + dev->if_port = IF_PORT_100BASEFX; + } + else { + *speed = IF_PORT_100BASETX; + dev->if_port = IF_PORT_100BASETX; + } + } + + } + else { + *link = 0; + *speed = 0; + dev->if_port = IF_PORT_UNKNOWN; + } + return 0; + } + #ifdef CONFIG_MIPS_BOSPORUS int stub_init(struct net_device *dev, int phy_addr) { @@ -620,6 +711,12 @@ } #endif +struct phy_ops ns_83847_ops = { + ns_83847_init, + ns_83847_reset, + ns_83847_status, +}; + struct phy_ops bcm_5201_ops = { bcm_5201_init, bcm_5201_reset, @@ -679,6 +776,7 @@ {"LSI 80227 10/100 BaseT PHY",0x0016,0xf840, &lsi_80227_ops,0}, {"Intel LXT971A Dual Speed PHY",0x0013,0x78e2, &lxt971a_ops,0}, {"Kendin KS8995M 10/100 BaseT PHY",0x0022,0x1450, &ks8995m_ops,0}, + {"Natsemi DP83847 PHY", 0x2000, 0x5c30, &ns_83847_ops }, #ifdef CONFIG_MIPS_BOSPORUS {"Stub", 0x1234, 0x5678, &stub_ops }, #endif @@ -872,6 +970,8 @@ } } } + printk(KERN_ERR "%s: Au1x No MII transceivers found!\n", dev->name); + return -1; found: #ifdef CONFIG_MIPS_BOSPORUS diff -Naur linux-2.4.31.org/drivers/net/au1000_eth.h linux-2.4.31/drivers/net/au1000_eth.h --- linux-2.4.31.org/drivers/net/au1000_eth.h 2004-02-18 08:36:31.000000000 -0500 +++ linux-2.4.31/drivers/net/au1000_eth.h 2005-08-22 12:31:37.000000000 -0400 @@ -86,6 +86,27 @@ #define MII_STAT_CAN_TX_FDX 0x4000 #define MII_STAT_CAN_T4 0x8000 +/* mii registers for NS 83847 */ +#define MII_NS_PHYSTS 0x10 +#define MII_NS_FCSCR 0x14 +#define MII_NS_RECR 0x15 +#define MII_NS_PCSR 0x16 +#define MII_NS_PHYCTRL 0x19 +#define MII_NS_10BTSCR 0x1a +#define MII_NS_CDCTRL 0x1b + +/* MII_NS_PHYSTS bits */ +#define MII_NS_PHYSTS_LINK (1) +#define MII_NS_PHYSTS_SPEED_10 (1<<1) +#define MII_NS_PHYSTS_DUPLEX_FULL (1<<2) + +/* MII_NS_PHYCTRL bits */ +#define MII_NS_PHYCTRL_BP_STRETCH (1<<8) + +/* MII_NS_CDCTRL bits */ +#define MII_NS_CDCTRL_CD_ENABLE (1<<15) +#define MII_NS_CDCTRL_RISETIME (1<<11) +#define MII_NS_CDCTRL_FALLTIME (1<<9) #define MII_ID1_OUI_LO 0xFC00 /* low bits of OUI mask */ #define MII_ID1_MODEL 0x03F0 /* model number */ target/device/jp/q5/kernel-patches-2.4.32/006-cfi 0 → 100644 +27 −0 Original line number Diff line number Diff line diff -Naur linux-2.4.31.org/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.4.31/drivers/mtd/chips/cfi_cmdset_0002.c --- linux-2.4.31.org/drivers/mtd/chips/cfi_cmdset_0002.c 2004-11-17 06:54:21.000000000 -0500 +++ linux-2.4.31/drivers/mtd/chips/cfi_cmdset_0002.c 2005-08-22 12:14:17.000000000 -0400 @@ -510,7 +510,7 @@ or tells us why it failed. */ dq6 = CMD(1<<6); dq5 = CMD(1<<5); - timeo = jiffies + (HZ/1000); /* setting timeout to 1ms for now */ + timeo = jiffies + (HZ); /* setting timeout to 1s for now */ oldstatus = cfi_read(map, adr); status = cfi_read(map, adr); @@ -950,12 +950,8 @@ oldstatus = cfi_read( map, adr ); status = cfi_read( map, adr ); - if( ( oldstatus & 0x00FF ) == ( status & 0x00FF ) ) + if( ( oldstatus & 0x00FF ) != ( status & 0x00FF ) ) { - printk( "Warning: DQ5 raised while erase operation was in progress, but erase completed OK\n" ); - } - else - { /* DQ5 is active so we can do a reset and stop the erase */ cfi_write(map, CMD(0xF0), chip->start); printk( KERN_WARNING "Internal flash device timeout occured or write operation was performed while flash was erasing\n" ); target/device/jp/q5/kernel-patches-2.4.32/007-au1000 0 → 100644 +13 −0 Original line number Diff line number Diff line --- linux-2.4.32_old/arch/mips/au1000/common/clocks.c 2005-01-19 15:09:26.000000000 +0100 +++ linux-2.4.32/arch/mips/au1000/common/clocks.c 2006-01-27 13:51:39.000000000 +0100 @@ -85,9 +85,7 @@ lcd_clock = sys_busclk / 4; if (lcd_clock > 50000) /* Epson MAX */ - printk(__FUNCTION__ - ": warning: LCD clock too high (%d KHz)\n", - lcd_clock); + printk("warning: LCD clock too high (%d KHz)\n", lcd_clock); } unsigned int get_au1x00_lcd_clock(void) target/device/jp/q5/kernel-patches-2.4.32/008-wbflush 0 → 100644 +14 −0 Original line number Diff line number Diff line --- linux-2.4.32_old/include/asm-mips/wbflush.h 2006-01-26 15:16:14.000000000 +0100 +++ linux-2.4.32/include/asm-mips/wbflush.h 2006-01-27 15:25:54.030500656 +0100 @@ -15,9 +15,8 @@ #ifdef CONFIG_CPU_HAS_WB -extern void (*__wbflush)(void); -extern void wbflush_setup(void); - +#define __wbflush() { __asm__ volatile ("sync"); } + #define wbflush() \ do { \ __sync(); \ Loading
target/device/jp/q5/kernel-patches-2.4.32/001-q5 0 → 100644 +342 −0 Original line number Diff line number Diff line diff -Naur linux-2.4.31.org/arch/mips/Makefile linux-2.4.31/arch/mips/Makefile --- linux-2.4.31.org/arch/mips/Makefile 2005-01-19 09:09:26.000000000 -0500 +++ linux-2.4.31/arch/mips/Makefile 2005-09-10 17:29:44.000000000 -0400 @@ -241,6 +241,16 @@ endif # +# jp-embedded Q5 board +# +ifdef CONFIG_MIPS_Q5 +LIBS += arch/mips/jp-embedded/q5/q5.o \ + arch/mips/au1000/common/au1000.o +SUBDIRS += arch/mips/jp-embedded/q5 arch/mips/au1000/common +LOADADDR := 0x80100000 +endif + +# # Au1x00 (AMD/Alchemy) eval boards # ifdef CONFIG_MIPS_DB1000 diff -Naur linux-2.4.31.org/arch/mips/au1000/common/pci_fixup.c linux-2.4.31/arch/mips/au1000/common/pci_fixup.c --- linux-2.4.31.org/arch/mips/au1000/common/pci_fixup.c 2005-01-19 09:09:26.000000000 -0500 +++ linux-2.4.31/arch/mips/au1000/common/pci_fixup.c 2005-09-10 17:47:29.000000000 -0400 @@ -101,7 +101,7 @@ void __init pcibios_fixup_irqs(void) { -#if defined( CONFIG_SOC_AU1500 ) || defined( CONFIG_SOC_AU1550 ) +#if defined( CONFIG_MIPS_PB1500 ) || defined( CONFIG_MIPS_PB1550 ) unsigned int slot; unsigned char pin; struct pci_dev *dev; diff -Naur linux-2.4.31.org/arch/mips/config-shared.in linux-2.4.31/arch/mips/config-shared.in --- linux-2.4.31.org/arch/mips/config-shared.in 2005-01-19 09:09:27.000000000 -0500 +++ linux-2.4.31/arch/mips/config-shared.in 2005-08-23 00:30:32.000000000 -0400 @@ -31,6 +31,7 @@ dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32 dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32 dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32 +dep_bool 'Support for jp-embedded Q5 board' CONFIG_MIPS_Q5 $CONFIG_MIPS32 dep_bool 'Support for MyCable XXS1500 board' CONFIG_MIPS_XXS1500 $CONFIG_MIPS32 dep_bool 'Support for 4G Systems MTX-1 board' CONFIG_MIPS_MTX1 $CONFIG_MIPS32 dep_bool 'Support for Cogent CSB250 board' CONFIG_COGENT_CSB250 $CONFIG_MIPS32 @@ -277,6 +278,12 @@ define_bool CONFIG_NONCOHERENT_IO y define_bool CONFIG_PC_KEYB y fi +if [ "$CONFIG_MIPS_Q5" = "y" ]; then + define_bool CONFIG_SOC_AU1X00 y + define_bool CONFIG_SOC_AU1500 y + define_bool CONFIG_NONCOHERENT_IO y + define_bool CONFIG_PC_KEYB y +fi if [ "$CONFIG_MIPS_DB1000" = "y" ]; then define_bool CONFIG_SOC_AU1X00 y define_bool CONFIG_SOC_AU1000 y @@ -729,6 +736,7 @@ "$CONFIG_MIPS_PB1000" = "y" -o \ "$CONFIG_MIPS_PB1100" = "y" -o \ "$CONFIG_MIPS_PB1500" = "y" -o \ + "$CONFIG_MIPS_Q5" = "y" -o \ "$CONFIG_NEC_OSPREY" = "y" -o \ "$CONFIG_NEC_EAGLE" = "y" -o \ "$CONFIG_NINO" = "y" -o \ diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/Makefile linux-2.4.31/arch/mips/jp-embedded/q5/Makefile --- linux-2.4.31.org/arch/mips/jp-embedded/q5/Makefile 1969-12-31 19:00:00.000000000 -0500 +++ linux-2.4.31/arch/mips/jp-embedded/q5/Makefile 2005-09-10 16:46:20.000000000 -0400 @@ -0,0 +1,9 @@ +USE_STANDARD_AS_RULE := true + +O_TARGET := q5.o + +export-objs = init.o + +obj-y := init.o board_setup.o irqmap.o + +include $(TOPDIR)/Rules.make diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/board_setup.c linux-2.4.31/arch/mips/jp-embedded/q5/board_setup.c --- linux-2.4.31.org/arch/mips/jp-embedded/q5/board_setup.c 1969-12-31 19:00:00.000000000 -0500 +++ linux-2.4.31/arch/mips/jp-embedded/q5/board_setup.c 2005-08-30 14:46:21.000000000 -0400 @@ -0,0 +1,97 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * jp-embedded Q5 board setup. + * + * Author: jp@jp-embedded.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/config.h> +#include <linux/init.h> +#include <linux/sched.h> +#include <linux/ioport.h> +#include <linux/mm.h> +#include <linux/console.h> +#include <linux/mc146818rtc.h> +#include <linux/delay.h> + +#include <asm/cpu.h> +#include <asm/bootinfo.h> +#include <asm/irq.h> +#include <asm/keyboard.h> +#include <asm/mipsregs.h> +#include <asm/reboot.h> +#include <asm/pgtable.h> +#include <asm/au1000.h> +#include <asm/pb1500.h> + +#ifdef CONFIG_USB_OHCI +// Enable the workaround for the OHCI DoneHead +// register corruption problem. +#define CONFIG_AU1000_OHCI_FIX +#endif + +#ifdef CONFIG_RTC +extern struct rtc_ops pb1500_rtc_ops; +#endif + +void board_reset (void) +{ + /* Hit BCSR.SYSTEM_CONTROL[SW_RST] obs */ + au_writel(0x00000000, 0xAE00001C); +} + +void __init board_setup(void) +{ + u32 pin_func; + u32 sys_freqctrl, sys_clksrc; + +#ifdef CONFIG_PCI + // Setup PCI bus controller + au_writel(0, Au1500_PCI_CMEM); + au_writel(0x00003fff, Au1500_CFG_BASE); + au_writel(0xf, Au1500_PCI_CFG); + au_writel(0xf0000000, Au1500_PCI_MWMASK_DEV); + au_writel(0, Au1500_PCI_MWBASE_REV_CCL); + au_writel(0x02a00356, Au1500_PCI_STATCMD); + au_writel(0x00003c04, Au1500_PCI_HDRTYPE); + au_writel(0x00000008, Au1500_PCI_MBAR); + au_sync(); +#endif + + /* Enable sys bus clock divider when IDLE state or no bus activity. */ + au_writel(au_readl(SYS_POWERCTRL) | (0x3 << 5), SYS_POWERCTRL); + +#ifdef CONFIG_RTC + rtc_ops = &pb1500_rtc_ops; + // Enable the RTC if not already enabled + if (!(au_readl(0xac000028) & 0x20)) { + printk("enabling clock ...\n"); + au_writel((au_readl(0xac000028) | 0x20), 0xac000028); + } + // Put the clock in BCD mode + if (readl(0xac00002C) & 0x4) { /* reg B */ + au_writel(au_readl(0xac00002c) & ~0x4, 0xac00002c); + au_sync(); + } +#endif +} diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/init.c linux-2.4.31/arch/mips/jp-embedded/q5/init.c --- linux-2.4.31.org/arch/mips/jp-embedded/q5/init.c 1969-12-31 19:00:00.000000000 -0500 +++ linux-2.4.31/arch/mips/jp-embedded/q5/init.c 2005-09-10 16:43:21.000000000 -0400 @@ -0,0 +1,80 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * jp-embedded Q5 board setup. + * + * Author: jp@jp-embedded.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/init.h> +#include <linux/mm.h> +#include <linux/sched.h> +#include <linux/bootmem.h> +#include <asm/addrspace.h> +#include <asm/bootinfo.h> +#include <linux/string.h> +#include <linux/kernel.h> +#include <linux/sched.h> + +int prom_argc; +char **prom_argv, **prom_envp; +extern void __init prom_init_cmdline(void); +extern char *prom_getenv(char *envname); +void (*__wbflush) (void); + +void au1500_wbflush(void) +{ + __asm__ volatile ("sync"); +} + +const char *get_system_type(void) +{ + return "jp-embedded Q5"; +} + +int __init prom_init(int argc, char **argv, char **envp, int *prom_vec) +{ + unsigned char *memsize_str; + unsigned long memsize; + + prom_argc = argc; + prom_argv = argv; + prom_envp = envp; + + __wbflush = au1500_wbflush; + + /* obs */ + mips_machgroup = MACH_GROUP_ALCHEMY; + mips_machtype = MACH_PB1500; + + prom_init_cmdline(); + memsize_str = prom_getenv("memsize"); + if (!memsize_str) { + memsize = 0x04000000; + } else { + memsize = simple_strtol(memsize_str, NULL, 0); + } + add_memory_region(0, memsize, BOOT_MEM_RAM); + return 0; +} + +EXPORT_SYMBOL(__wbflush); diff -Naur linux-2.4.31.org/arch/mips/jp-embedded/q5/irqmap.c linux-2.4.31/arch/mips/jp-embedded/q5/irqmap.c --- linux-2.4.31.org/arch/mips/jp-embedded/q5/irqmap.c 1969-12-31 19:00:00.000000000 -0500 +++ linux-2.4.31/arch/mips/jp-embedded/q5/irqmap.c 2005-09-10 16:45:18.000000000 -0400 @@ -0,0 +1,61 @@ +/* + * + * BRIEF MODULE DESCRIPTION + * jp-embedded Q5 board setup. + * + * Author: jp@jp-embedded.com + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN + * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF + * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * You should have received a copy of the GNU General Public License along + * with this program; if not, write to the Free Software Foundation, Inc., + * 675 Mass Ave, Cambridge, MA 02139, USA. + */ +#include <linux/errno.h> +#include <linux/init.h> +#include <linux/irq.h> +#include <linux/kernel_stat.h> +#include <linux/module.h> +#include <linux/signal.h> +#include <linux/sched.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/timex.h> +#include <linux/slab.h> +#include <linux/random.h> +#include <linux/delay.h> + +#include <asm/bitops.h> +#include <asm/bootinfo.h> +#include <asm/io.h> +#include <asm/mipsregs.h> +#include <asm/system.h> +#include <asm/au1000.h> + +au1xxx_irq_map_t au1xxx_irq_map[] = { + { AU1500_GPIO_201, INTC_INT_LOW_LEVEL, 0 }, + { AU1500_GPIO_202, INTC_INT_LOW_LEVEL, 0 }, + { AU1500_GPIO_203, INTC_INT_LOW_LEVEL, 0 }, + { AU1500_GPIO_204, INTC_INT_HIGH_LEVEL, 0}, + { AU1500_GPIO_205, INTC_INT_LOW_LEVEL, 0 }, + { AU1500_GPIO_206, INTC_INT_FALL_EDGE, 0 }, + { AU1500_GPIO_207, INTC_INT_LOW_LEVEL, 0 }, +}; + +int au1xxx_nr_irqs = sizeof(au1xxx_irq_map)/sizeof(au1xxx_irq_map_t); + --- linux-2.4.31.org/Documentation/Configure.help 2005-04-03 21:42:19.000000000 -0400 +++ linux-2.4.31/Documentation/Configure.help 2005-09-10 18:50:14.340000000 -0400 @@ -2197,6 +2197,12 @@ MIPS-32-based Baget embedded system. This chipset is better known via the NE2100 cards. +jp-embedded Q5 support +CONFIG_MIPS_Q5 + This enables support for jp-embedded's MIPS based boards. The + boards uses the AU1500 cpu. For more information about these + boards, see <http://www.jp-embedded.com/>. + Support for DECstations CONFIG_DECSTATION This enables support for DEC's MIPS based workstations. For details
target/device/jp/q5/kernel-patches-2.4.32/005-dp83847 0 → 100644 +162 −0 Original line number Diff line number Diff line diff -Naur linux-2.4.31.org/drivers/net/au1000_eth.c linux-2.4.31/drivers/net/au1000_eth.c --- linux-2.4.31.org/drivers/net/au1000_eth.c 2005-01-19 09:09:56.000000000 -0500 +++ linux-2.4.31/drivers/net/au1000_eth.c 2005-08-22 12:24:31.000000000 -0400 @@ -595,6 +595,97 @@ return 0; } +int ns_83847_reset(struct net_device *dev, int phy_addr) + { + s16 mii_control, timeout; + + // printk("ns_reset\n"); + mii_control = mdio_read(dev, phy_addr, MII_CONTROL); + mdio_write(dev, phy_addr, MII_CONTROL, mii_control | MII_CNTL_RESET); + mdelay(1); + for (timeout = 100; timeout > 0; --timeout) { + mii_control = mdio_read(dev, phy_addr, MII_CONTROL); + if ((mii_control & MII_CNTL_RESET) == 0) + break; + mdelay(1); + } + if (mii_control & MII_CNTL_RESET) { + printk(KERN_ERR "%s PHY reset timeout !\n", dev->name); + return -1; + } + return 0; + } + +int ns_83847_init(struct net_device *dev, int phy_addr) + { + s16 data; + // printk("ns_init\n"); + + /* Stop auto-negotiation */ + // data = mdio_read(dev, phy_addr, MII_CONTROL); + // mdio_write(dev, phy_addr, MII_CONTROL, data & ~MII_CNTL_AUTO); + // mdio_write(dev, phy_addr, 0, 0x0000); + mdio_write(dev, phy_addr, MII_CONTROL, MII_CNTL_F100 /* | MII_CNTL_FDX */); + + /* Set advertisement to 10/100 and Half/Full duplex (full capabilities) */ + data = mdio_read(dev, phy_addr, MII_ANADV); + /* obs PAUSE bit */ + data |= MII_NWAY_TX | MII_NWAY_TX_FDX | MII_NWAY_T_FDX | MII_NWAY_T; /* MII_NWAY_T4 not sopported */ ; + mdio_write(dev, phy_addr, MII_ANADV, data); + + /* Bypass led stretching? */ + data = mdio_read(dev, phy_addr, MII_NS_PHYCTRL); + data |= MII_NS_PHYCTRL_BP_STRETCH; + mdio_write(dev, phy_addr, MII_NS_PHYCTRL, data); + + /* Restart auto-negotiation */ + data = mdio_read(dev, phy_addr, MII_CONTROL); + data |= MII_CNTL_RST_AUTO | MII_CNTL_AUTO; + mdio_write(dev, phy_addr, MII_CONTROL, data); + + return 0; + } + +int ns_83847_status(struct net_device *dev, int phy_addr, u16 *link, u16 *speed) + { + u16 mii_data; + struct au1000_private *aup; + + if (!dev) { + printk(KERN_ERR "ns_83847_status error: NULL dev\n"); + return -1; + } + aup = (struct au1000_private *) dev->priv; + + mii_data = mdio_read(dev, aup->phy_addr, MII_STATUS); + // printk("ns_status: %04x\n", mii_data); + if (mii_data & MII_STAT_LINK) { + *link = 1; + mii_data = mdio_read(dev, aup->phy_addr, MII_NS_PHYSTS); + if (mii_data & MII_NS_PHYSTS_SPEED_10) { + *speed = IF_PORT_10BASET; + dev->if_port = IF_PORT_10BASET; + } + else { + if (mii_data & MII_NS_PHYSTS_DUPLEX_FULL) { + *speed = IF_PORT_100BASEFX; + dev->if_port = IF_PORT_100BASEFX; + } + else { + *speed = IF_PORT_100BASETX; + dev->if_port = IF_PORT_100BASETX; + } + } + + } + else { + *link = 0; + *speed = 0; + dev->if_port = IF_PORT_UNKNOWN; + } + return 0; + } + #ifdef CONFIG_MIPS_BOSPORUS int stub_init(struct net_device *dev, int phy_addr) { @@ -620,6 +711,12 @@ } #endif +struct phy_ops ns_83847_ops = { + ns_83847_init, + ns_83847_reset, + ns_83847_status, +}; + struct phy_ops bcm_5201_ops = { bcm_5201_init, bcm_5201_reset, @@ -679,6 +776,7 @@ {"LSI 80227 10/100 BaseT PHY",0x0016,0xf840, &lsi_80227_ops,0}, {"Intel LXT971A Dual Speed PHY",0x0013,0x78e2, &lxt971a_ops,0}, {"Kendin KS8995M 10/100 BaseT PHY",0x0022,0x1450, &ks8995m_ops,0}, + {"Natsemi DP83847 PHY", 0x2000, 0x5c30, &ns_83847_ops }, #ifdef CONFIG_MIPS_BOSPORUS {"Stub", 0x1234, 0x5678, &stub_ops }, #endif @@ -872,6 +970,8 @@ } } } + printk(KERN_ERR "%s: Au1x No MII transceivers found!\n", dev->name); + return -1; found: #ifdef CONFIG_MIPS_BOSPORUS diff -Naur linux-2.4.31.org/drivers/net/au1000_eth.h linux-2.4.31/drivers/net/au1000_eth.h --- linux-2.4.31.org/drivers/net/au1000_eth.h 2004-02-18 08:36:31.000000000 -0500 +++ linux-2.4.31/drivers/net/au1000_eth.h 2005-08-22 12:31:37.000000000 -0400 @@ -86,6 +86,27 @@ #define MII_STAT_CAN_TX_FDX 0x4000 #define MII_STAT_CAN_T4 0x8000 +/* mii registers for NS 83847 */ +#define MII_NS_PHYSTS 0x10 +#define MII_NS_FCSCR 0x14 +#define MII_NS_RECR 0x15 +#define MII_NS_PCSR 0x16 +#define MII_NS_PHYCTRL 0x19 +#define MII_NS_10BTSCR 0x1a +#define MII_NS_CDCTRL 0x1b + +/* MII_NS_PHYSTS bits */ +#define MII_NS_PHYSTS_LINK (1) +#define MII_NS_PHYSTS_SPEED_10 (1<<1) +#define MII_NS_PHYSTS_DUPLEX_FULL (1<<2) + +/* MII_NS_PHYCTRL bits */ +#define MII_NS_PHYCTRL_BP_STRETCH (1<<8) + +/* MII_NS_CDCTRL bits */ +#define MII_NS_CDCTRL_CD_ENABLE (1<<15) +#define MII_NS_CDCTRL_RISETIME (1<<11) +#define MII_NS_CDCTRL_FALLTIME (1<<9) #define MII_ID1_OUI_LO 0xFC00 /* low bits of OUI mask */ #define MII_ID1_MODEL 0x03F0 /* model number */
target/device/jp/q5/kernel-patches-2.4.32/006-cfi 0 → 100644 +27 −0 Original line number Diff line number Diff line diff -Naur linux-2.4.31.org/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.4.31/drivers/mtd/chips/cfi_cmdset_0002.c --- linux-2.4.31.org/drivers/mtd/chips/cfi_cmdset_0002.c 2004-11-17 06:54:21.000000000 -0500 +++ linux-2.4.31/drivers/mtd/chips/cfi_cmdset_0002.c 2005-08-22 12:14:17.000000000 -0400 @@ -510,7 +510,7 @@ or tells us why it failed. */ dq6 = CMD(1<<6); dq5 = CMD(1<<5); - timeo = jiffies + (HZ/1000); /* setting timeout to 1ms for now */ + timeo = jiffies + (HZ); /* setting timeout to 1s for now */ oldstatus = cfi_read(map, adr); status = cfi_read(map, adr); @@ -950,12 +950,8 @@ oldstatus = cfi_read( map, adr ); status = cfi_read( map, adr ); - if( ( oldstatus & 0x00FF ) == ( status & 0x00FF ) ) + if( ( oldstatus & 0x00FF ) != ( status & 0x00FF ) ) { - printk( "Warning: DQ5 raised while erase operation was in progress, but erase completed OK\n" ); - } - else - { /* DQ5 is active so we can do a reset and stop the erase */ cfi_write(map, CMD(0xF0), chip->start); printk( KERN_WARNING "Internal flash device timeout occured or write operation was performed while flash was erasing\n" );
target/device/jp/q5/kernel-patches-2.4.32/007-au1000 0 → 100644 +13 −0 Original line number Diff line number Diff line --- linux-2.4.32_old/arch/mips/au1000/common/clocks.c 2005-01-19 15:09:26.000000000 +0100 +++ linux-2.4.32/arch/mips/au1000/common/clocks.c 2006-01-27 13:51:39.000000000 +0100 @@ -85,9 +85,7 @@ lcd_clock = sys_busclk / 4; if (lcd_clock > 50000) /* Epson MAX */ - printk(__FUNCTION__ - ": warning: LCD clock too high (%d KHz)\n", - lcd_clock); + printk("warning: LCD clock too high (%d KHz)\n", lcd_clock); } unsigned int get_au1x00_lcd_clock(void)
target/device/jp/q5/kernel-patches-2.4.32/008-wbflush 0 → 100644 +14 −0 Original line number Diff line number Diff line --- linux-2.4.32_old/include/asm-mips/wbflush.h 2006-01-26 15:16:14.000000000 +0100 +++ linux-2.4.32/include/asm-mips/wbflush.h 2006-01-27 15:25:54.030500656 +0100 @@ -15,9 +15,8 @@ #ifdef CONFIG_CPU_HAS_WB -extern void (*__wbflush)(void); -extern void wbflush_setup(void); - +#define __wbflush() { __asm__ volatile ("sync"); } + #define wbflush() \ do { \ __sync(); \
